Accommodating workload diversity in chip multiprocessors
A minimal dual-core speculative multi-threading architecture,. in IEEE International Conference on Computer Design, Oct. in 20th International Symposium on Computer Architecture, May 1993. Multi-core processors support all modern electronic devices nowadays. He has many book chapters published by international press and about 150 published papers in international (conf. He has served as a reviewer for many high quality journals, including Journal of Engineering Mansoura University.However, power management is one of the most critical issues in the design of today’s microprocessors. from Computers & Systems Engineering, all from Mansoura University, Egypt. His interests are in the areas of network security, mobile agent, Network management, Search engine, pattern recognition, distributed databases, and performance analysis. Transactional memory: Architectural support for lock-free data structures,. ISCA 2010 More heterogeneous Synergistic processing in Cell's multicore architecture (IEEE Micro, March 2006, pdf) (M. This paper evaluates the present state of the artof energy-efficient embedded processor design techniques anddemonstrates, how small, variable-architecture embedded processors may exploit a run-time minimal architectural synthesis technique to achieve greater energy and area efficiency whilst maintaining performance.The pico MIPS architecture is presented, inspired by the MIPS, as an example of a minimal and energy efficient processor.
Slipstream Processors: Improving both Performance and Fault Tolerance.
In the context of embedded processor synthesis, both single-core and many-core, the types of algorithms and demands on the execution efficiency are usually known at the chip design time.
This knowledge can be utilised at the design stage to synthesise architectures optimised for energy consumption.
Firstly, we present an overview of both traditional energy saving techniques and new developments in architectural approaches to energy-efficient processing.
Secondly, we propose a pico MIPS architecture that serves as an architectural template for energy-efficient synthesis.
Search for accommodating workload diversity in chip multiprocessors:
Tullsen, In Thirteenth International Conference on Architectural Support for Programming Languages and Operating Systems, April, 2008.